*** priteau has joined #scientific-wg | 00:49 | |
*** priteau has quit IRC | 00:54 | |
*** priteau has joined #scientific-wg | 02:50 | |
*** priteau has quit IRC | 02:55 | |
-openstackstatus- NOTICE: Due to an unexpected outage with Zuul (1 hour), you'll need to recheck any jobs that were in progress. Sorry for the inconvenience. | 02:58 | |
*** priteau has joined #scientific-wg | 04:51 | |
*** priteau has quit IRC | 04:55 | |
masber | good afternoon all, I would like to setup FPGAs in Openstack, is there a way to do that? | 07:34 |
---|---|---|
masber | thank you | 07:34 |
*** priteau has joined #scientific-wg | 07:36 | |
*** priteau has quit IRC | 08:00 | |
*** priteau has joined #scientific-wg | 08:01 | |
*** priteau has quit IRC | 08:06 | |
*** priteau has joined #scientific-wg | 08:11 | |
*** priteau has quit IRC | 08:15 | |
*** priteau has joined #scientific-wg | 08:55 | |
*** priteau has quit IRC | 09:02 | |
*** priteau has joined #scientific-wg | 09:05 | |
*** priteau has quit IRC | 09:10 | |
*** priteau has joined #scientific-wg | 12:21 | |
*** jmlowe has joined #scientific-wg | 16:46 | |
bollig | masber: likely the same approach as GPUs | 16:56 |
bollig | what type of FPGA are you looking at? | 16:56 |
*** jmlowe has quit IRC | 17:09 | |
*** masber has quit IRC | 17:15 | |
*** priteau has quit IRC | 22:50 | |
*** priteau has joined #scientific-wg | 23:13 | |
*** jmlowe has joined #scientific-wg | 23:13 | |
*** priteau has quit IRC | 23:17 | |
*** jmlowe has quit IRC | 23:21 | |
*** masber has joined #scientific-wg | 23:30 | |
*** jmlowe has joined #scientific-wg | 23:33 | |
*** jmlowe has quit IRC | 23:38 |
Generated by irclog2html.py 2.15.3 by Marius Gedminas - find it at mg.pov.lt!